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Ordering number : EN8791
LB11889M
Overview
Monolithic Digital IC
For VCR Capstan
Three-Phase Brushless Motor Driver
The LB11889M is three-phase brushless motor driver for VCR capstan motors.
Features
* 3-phase full-wave current linear drive. * Torque ripple correction circuit (fixed correction ratio). * Current limiter circuit with control characteristics gain switching. * Output stage upper/lower oversaturation prevention circuit (No external capacitor required). * FG amplifier built in. * Thermal shutdown circuit built in. Absolute Maximum Ratings at Ta = 25C
Parameter Maximum power supply voltage Symbol VCC max VS max Maximum output current Allowable power dissipation voltage Operating temperature Storage temperature IO max Pd max Topr Tstg Independent IC Conditions Ratings 7 24 1.3 950 -20 to +75 -55 to +150 Unit V V A mW C C
Allowable Operating Range at Ta = 25C
Parameter Power supply voltage Symbol VS VCC Hall input amplitude GSENSE input range VHALL VGSENSE Between hall inputs Relative to the control system GND Conditions Ratings 5 to 22 4.5 to 5.5 30 to 80 -0.20 to +0.20 Unit V V mVo-p V
Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before using any SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein.
D2706 TI IM B8-4207 No.8791-1/11
LB11889M
Electrical Characteristics at Ta = 25C, VCC = 5V, VS = 15V
Ratings Parameter VCC power supply current Output Output saturation voltage VOsat1 VOsat2 Output leak current FR FR pin input threshold voltage FR pin input input bias current Control CTLREF pin voltage CTLREF pin input range CTL pin input bias current CTL pin control start voltage CTL pin control switching voltage CTL pin control Gm1 CTL pin control Gm2 Current limiter LIM current limiter offset voltage LIM pin input bias current LIM pin current limiter level Hall amplifier Hall amplifier input offset voltage Hall amplifier input bias current Hall amplifier common-mode TRC Torque ripple correction factor ADJ pin voltage FG amplifier FG amplifier input offset voltage FG amplifier input bias current FG amplifier output saturation voltage FG amplifier common-mode input voltage Saturation Saturation prevention circuit lower set voltage TSD TSD operating temperature TSD temperature hysteresis width T-TSD TSD (Design target) Note.1 (Design target) Note.1 180 20 C C VOsat (DET) Voltage between each OUT and Rf at IO = 10mA, Rf = 0.5, VCTL = VLIM = 5V 0.175 0.25 0.325 V VCM (FG) 0.5 Voff (FG) Ib (FG) VOsat (FG) At internal pull-up resistor on the sink side -8 -100 0.5 4.0 +8 mV nA V V TRC VADJ At bottom and peak of Rf waveform at IO = 200mA (RF = 0.5, ADJ-OPEN) Note 2 2.37 9 2.50 2.63 % V Voff (HALL) Ib (HALL) VCM (HALL) 1.3 -6 1.0 +6 3.0 3.3 mV A V Voff (LIM) Ib (LIM) Ilim Rf = 0.5, VCTL = 5V, IO10mA With hall input logic fixed (U, V, W = H, H, L) VCTL = 5V, CTLREF : OPEN, VLIM = 0V Rf = 0.5, VCTL = 5V, VLIM = 2.06V With hall input logic fixed (U, V, W = H, H, L) 140 -2.5 830 900 970 200 260 mV A mA VCREF VCREF IN Ib (CTL) VCTL (ST) VCTL (ST2) Gm1 (CTL) Gm2 (CTL) VCTL = 5V, CTLREF : OPEN Rf = 0.5, VLIM = 5V, IO10mA With hall input logic fixed (U, V, W = H, H, L) Rf = 0.5, VLIM = 5V Rf = 0.5, IO = 200mA With hall input logic fixed (U, V, W = H, H, L) Rf = 0.5, VCTL = 200mV With hall input logic fixed (U, V, W = H, H, L) 2.20 3.00 0.52 1.20 2.35 3.15 0.65 1.50 2.37 1.70 2.50 2.63 3.50 8.0 2.50 3.30 0.78 1.80 V V A V V A/V A/V VFSR Ib (FSR) 2.25 -5.0 2.50 2.75 V A IOleak IO = 500mA, Rf = 0.5, sink+source VCTL = VLIM = 5V (With saturation prevention) IO = 1.0A, Rf = 0.5, sink+source VCTL = VLIM = 5V (With saturation prevention) 2.1 2.6 2.6 V 3.5 1.0 mA Symbol ICC Conditions RL = , VCTL = 0V, VLIM = 0V (at static mode) min typ 12 max 18 Unit mA
Note 1. No measurements are made on the parameters with Note (Design target).
No.8791-2/11
LB11889M
Note 2. The torque ripple correction factor is obtained based on the voltage waveform across Rf as shown below.
Vp
I
II
III
IV
V
VI
Vb
Each hall logic setting GND lebel 2x (Vp-Vb) Correnction factor = Vp+Vb x100 (%)
Package Dimensions
unit : mm (typ) 3280A
15.2
1.0
Pd max - Ta
0.95W Independent
Allowable power dissipation, Pd max - W
36
19
IC
0.8
10.5
7.9
0.6
0.57W
0.65
0.4
1 0.8 (0.8) 0.35
18 0.25
2.45MAX
0.2
(2.25)
0 -20
0
20
40
60
80
100 ILB01488
Ambient temperature, Ta - C
0.1
SANYO : MFP36SLF(375mil)
No.8791-3/11
LB11889M
Truth Table and Control Function
Source Sink 1 2 3 4 5 6 VW WV UW WU UV VU WV VW WU UW VU UV Hall input U H H H L L L V H L L L H H W L L H H H L FR H L H L H L H L H L H L
Note) "H" for FR represents a voltage of 2.75V or greater ; "L" represents a voltage of 2.25V or lower (at VCC = 5V). Note) Input "H" for all input represents that (+) is higher than each phase input (-) by 0.01V or greater ; input "L" represents that (+) is lower than each phase input (-) by 0.01V or greatre. Note) Since this drive scheme is the 180 energizing scheme, phases other than Sink, Source phases are not turned OFF.
Control Function & Current Limiter Function
Control characteristics VLIM = 5V CTLREF : OPEN IOUT IOUT Current limiter characteristics VCTL = 5V CTLREF : OPEN
Slope = 0.50A/Vtyp Gm1 = 0.65A/Vtyp Gm2 = 1.50A/Vtyp VCTL 0 1 2 2.35Vtyp 3 3.15Vtyp 10 5 0 10 2 3 VLIM 4
200mVtyp
No.8791-4/11
LB11889M
Pin Functions
Pin name FGIN (-) FGIN (+) FG-OUT CTL CTLREF LIM FC UIN+, UINVIN+, VINWIN+, WINVCC VS ADJ Pin no. 3 4 5 6 7 8 9 10, 11 12, 13 14, 15 16 21 22 Functions Input pin for the FG amplifier to be used with inverted input. A feedback resistor is connected between this pin and FG OUT. Noninverting input pin for the FG amplifier to be used as differential input. No bias is applied internally. FG amplifier output pin with resistive load internally. Speed control pin. Control is performed by means of constant current drive which is applied by current feedback from Rf. Gm = 0.65A/V & 1.50A/V TYP at Rf = 0.5 Control reference voltage pin. The voltage is set at approximately VCC/2 internally, but can be varied by applying a voltage through a low impedance. (The input impedance is approximately 2.5k.) Current limiter function control pin. This pin voltage is capable of varying the output current linealy. Slope = 0.5A/V TYP at Rf = 0.5 Speed control loop's frequency characteristics correction pin. U phase hall element input pin. "H" for logic represents IN+>IN-. V phase hall element input pin. "H" for logic represents IN+>IN-. W phase hall element input pin. "H" for logic represents IN+>IN-. Power supply pin used to supply to each circuit other than the output blocks inside the IC. This voltage must be stabilized to reject noise and ripple. Power supply pin for output blocks. Pin to be used to adjust the torque ripple correction factor externally. When adjusting the correction factor, apply voltage externally to the ADJ pin through a low impedance. Increasing the applied voltage decreases the correction factor ; lowering the applied voltage increases the correction factor. The rate of change, when left open, ranges approximately from 0 to 2 times. Rf (PWR) Rf (SNS) 23 31 (Approximately VCC/2 is set internally and the input impedance is approximately 5k.) Output current detection pins. Current feedback is provided to the control blocks by connecting Rf between the pins and GND. The operation of the lower over-saturation prevention circuit and torque ripple correction circuit depends on the pin voltage. In particular, since the oversaturation prevention level is set by the pin voltage, decreasing the Rf value extremely may cause the lower over-saturation prevention to work less efficiently in the large current region. The PWR pin and SENSE pin must be connected. UOUT VOUT WOUT GSENSE 26 27 28 32 U phase output pin V phase output pin W phase output pin GND sensing pin. By connecting this pin to GND in the vicinity of the Rf resistor side of the Rf included motor GND wiring, the influence that the GND common impedance exerts on Rf can be excluded. (Must not be left open.) FR 33 Forward/reverse select pin. This pin voltage determines forward/reverse. (Vth = 2.5V typ. At VCC = 5V) GND 34 GND for other than output transistors. The lowest potential of output transistors is on the Rf pin. (With spark killer diode built in)
No.8791-5/11
LB11889M
Each Input/Output Equivalent Circuit
Pin name UIN (+) UIN (-) VIN (+) VIN (-) WIN (+) WIN (-) Input/Output equivalent circuit
Each (+) input 200 100A 200
Each (-) input
UOUT VOUT WOUT VS Rf (POWER) Rf (SENSE)
VS
VCC 150A Lower oversaturation prevention circuit input block VCC 10A 200 Rf (SENSE)
Each OUT
200 30k Rf (POWER)
CTL LIM CTLREF
VCC 5k
VCC
VCC 200A max LIM 200
CTL 200 100A
CTLREF
200 5k
FR ADJ
VCC
VCC
VCC 20A
VCC
200A
FR 200
ADJ
10k
Continued on next page.
10k
No.8791-6/11
1/2 VCC
6k
500
6k
10k
10k
LB11889M
Continued from preceding page.
Pin name FGIN (-) FGIN (+) Input/output equivalent circuit
VCC
5A
FGIN (-) 300
FGIN (+)
FGOUT FC
VCC
VCC
VCC
2k
FGOUT
300
10k FC
No.8791-7/11
LB11889M
Block Diagram
9 FC Output stage 21 VS UIN+ 10 UIN- 11
+ Synthesized output logarithmic compression block Hall input synthesizing block (Linear matrix) U U 26 U-OUT
VIN+ 12 VIN- 13
+ V -
Anti-logarithm & differential distribution
V
27 V-OUT
W IN+ 14 W IN- 15
W Upper saturation prevention control
28 W-OUT 23 Rf (PWR)
+ W -
gm
+ 31 Rf (SENSE) gm + Drive distribution circuit & lower saturation prevention control
Control amplifier 1 + CTL 6 + Control amplifier 2 + + LIMREF
Differential distribution & torque ripple correction block Feedback amplifier + gm -
22 ADJ
CTLREF 7
32 GSENSE LIM 8
FR 33
Forward /reverse select
TSD
FG amplifier
+
3 FGIN4 FGIN+
GND 34
5
FGOUT
VCC 16
Reference voltage Bandgap 1.2V
No.8791-8/11
LB11889M
Pin Assignment
FRAME FRAME FGIN(-) FGIN(+) FG-OUT CTL CTLREF LIM FC UIN(+) UIN(-) VIN(+) VIN(-) WIN(+) WIN(-) VCC FRAME FRAME
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Top view
36 35 34 33 32 31 30 29 28
FRAME FRAME GND FR GSENSE Rf(SENSE)
W-OUT V-OUT U-OUT
LB11889M
27 26 25 24 23 22 21 20 19
Rf(POWER) ADJ VS FRAME FRAME
Note: Although the FRAME pins and the GND pin are not connected internally in the IC, the FRAME pins must be connected to the GND pin externally for ground potential stabilization.
No.8791-9/11
Forward/reverse instruction voltage supply pin
0.5
Power GND
104F 104F 104F VS
ADJ voltage supply pin
Sample Application Circuit
GaAs is recommended for a hall element.
Hall output
Hall output
L 36 19
L R
L
LB11889M
R
Hall output
104F
The hall bias resistor R must be selected according to the sensor output.
1
18
VCC
Hall input
Current limiter setting voltage supply pin
MR 1M
CTLREF voltage supply pin
FG output pin
104F 12k
Torque instruction voltage supply pin
No.8791-10/11
Note) The component values shown in this application circuit example one merely provided as examples, and circuit operating characteristics are not guaranteed.
LB11889M
Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor products (including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Semiconductor Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of December, 2006. Specifications and information herein are subject to change without notice.
PS No.8791-11/11

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